Panduka Wijetunga
About Panduka Wijetunga
Panduka Wijetunga is a Senior Principal Engineer at Rambus, where he has worked since 2018. He holds a PhD and MSc in Electrical Engineering from the University of Southern California and has extensive experience in chip design and integration.
Work at Rambus
Panduka Wijetunga currently serves as a Senior Principal Engineer at Rambus, a position he has held since 2018. In this role, he has focused on the DDR5 RCD space, leading initiatives to regain market leadership. He previously worked at Rambus as a Principal Engineer from 2012 to 2017. During his tenure, he managed the complete chip integration that achieved the highest market share for DDR5 RCD upon the release of DDR5 server memory. He also generated initial designs for critical components such as the SMBUS interface, LDO, and oscillator, contributing to the development of a new product line.
Education and Expertise
Panduka Wijetunga earned a Bachelor of Science in Electrical Engineering from the University of Southern California, where he studied from 1992 to 1996. He continued his education at the same institution, obtaining a Master of Science in Electrical Engineering with a focus on Integrated Circuits from 1996 to 1998. He completed his academic journey with a PhD in Electrical Engineering, specializing in Integrated Circuits, from 1996 to 2003. His educational background provides a strong foundation for his expertise in chip design and engineering.
Previous Employment Experience
Prior to his current role at Rambus, Panduka Wijetunga held several engineering positions. He worked as an Engineering Fellow at Eta Compute from 2017 to 2018. Before that, he was a Member of Technical Staff (MTS) Analog Design Engineer at Zarlink Semiconductor from 2006 to 2012. His career also includes a position as MTS Scientist at Rockwell Scientific from 2003 to 2006. These roles have contributed to his extensive experience in analog design and chip integration.
Key Contributions to DDR5 RCD Market
Panduka Wijetunga has made significant contributions to the DDR5 RCD market. He led a bottom-up redesign of a chip, focusing on the clock/data path and new floorplan, which was critical in regaining market leadership in the DDR5 RCD space. His efforts in managing chip integration and generating initial designs for new product lines have positioned Rambus as a key player in the industry.
Early Education Background
Panduka Wijetunga completed his high school education at Royal College, where he focused on Math and Science. This early education laid the groundwork for his later studies in Electrical Engineering and his successful career in engineering and technology.